The research article presents the design of the direct form of the Finite Impulse Response (FIR) filter using VHDL programming language. Multimedia technology and broadband communication demand the low power and high performance design applications in Digital Signal Processing (DSP). The digital filters are most important element of the communication system and DSP. In the paper 7 tap FIR filter is implemented in Xilinx 14.2 software and functionally simulated in Modelsim 10.1 b software. The design of FIR filter of 4 x 4 configurations uses 9 adders and 16 multipliers. The design is also verified on SPARTAN 3E FPGA.
Finite Impulse Response (FIR), Field Programmable Gate Array (FPGA), Very High Speed Integrated Circuit Hardware Description language (VHDL).
Hanny Kumar; Kamal Kumar, Design and Implementation of Direct Form FIR Filter, HCTL Open International Journal of Technology Innovations and Research (IJTIR), Volume 18, Issue 2, February 2016, e-ISSN: 2321-1814, ISBN (Print): 978-1-944170-16-5.